A semiconductor device is equipped with an integrated circuit including a CMIS (Complementary Metal Oxide Semiconductor) circuit configuration as a basic structure. In a p-channel-type MIS-type field-effect transistor (also referred to as “FET”) (hereinafter, simply referred to as “p-type MIS transistor”) and an n-channel-type MIS-type field-effect transistor (hereinafter, simply referred to as “n-type MIS transistor”) which configure this CMIS circuit, a silicon oxide film is used as a material of a gate insulating film, and a polycrystalline silicon film is used as a material of a gate electrode.
For example, Japanese Patent Application Laid-Open No. 2008-288226 (Patent Document 1) discloses a technique of using a hafnium (Hf)-based oxide as oxide having a higher relative permittivity than that of silicon oxide so as to be applied to a gate insulating film of a MOS transistor. Moreover, for example, Japanese Patent Application Laid-Open No. 2008-288465 (Patent Document 2) discloses a technique of forming a gate insulating film so as to contain at least any one of Hf, aluminum (Al), and yttrium (Y). Moreover, for example, Japanese Patent Application Laid-Open No. 2007-329237 (Patent Document 3) discloses a technique in a p-channel transistor of forming a gate insulating film which is made of hafnium-based (HfSiON) High-k so as to contain aluminum atoms. Moreover, for example, Japanese Patent Application Laid-Open No. 2007-88122 (Patent Document 4) discloses a technique of using a High-k gate insulating film with a structure containing Hf or Y.
For example, Symposium on VLSI Technology, p. 224, 2006, (Non-Patent Document 1) describes a technique of shifting a threshold voltage of an n-channel-type MOSFET toward a negative direction by forming a cap layer containing lanthanum (La) and magnesium (Mg) whose thicknesses are 1 to 20 Å on a hafnium oxide film, which is described by V. Narayanan et al. Moreover, for example, Symposium on VLSI Technology, p. 68, 2007 (Non-Patent Document 2) describes a technique of shifting the threshold voltage of the n-channel-type MOSFET toward the negative direction by forming a cap layer containing La and/or strontium (Sr) or a metal cap layer containing scandium (Sc), erbium (Er), or their alloy on a HfSiON film, which is described by P. Sivasubramani et al. Moreover, for example, Symposium on VLSI Technology, p. 232, 2005 (Non-Patent Document 3) describes a technique capable of increasing a film thickness of an alumina film and decreasing a threshold voltage by forming the alumina film on a HfSiO film in order to control a threshold voltage of a p-channel-type MISFET, which is described by H-S. Jung et al. Moreover, for example, Japanese Patent Application No. 2005-514765 (Patent Document 5) discloses a technique of forming a HfSiO/interface layer structure by forming metal Hf on a silicon oxide film, and then, diffusing Hf by a thermal treatment. Moreover, for example, Applied Physics Letter, Vol. 83 (11), p. 2229, 2003 (Non-Patent Document 4) discloses a technique of forming hafnium oxide by performing plasma oxidation to metal Hf.